MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 391

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
16.3.5
Figure 156. RTC second and alarm waveform example with PR=0003, ALARM=00004
Figure 157. RTC Overflow waveform example with PR=0003
RTC_PR
RTC_Second
RTC_CNT
RTC_ALARM
RTC_PR
RTC_Second
RTC_CNT
RTC_Overflow
(not powered
in Standby)
(not powered
in Standby)
ALRF
OWF
0002
0002
0000
FFFFFFFB
RTCCLK
RTCCLK
RTC flag assertion
The RTC Second flag (SECF) is asserted on each RTC Core clock cycle before the update
of the RTC Counter.
The RTC Overflow flag (OWF) is asserted on the last RTC Core clock cycle before the
counter reaches 0x0000.
The RTC_Alarm and RTC Alarm flag (ALRF) (see
Core clock cycle before the counter reaches the RTC Alarm value stored in the Alarm
register increased by one (RTC_ALR + 1). The write operation in the RTC Alarm and RTC
Second flag must be synchronized by using one of the following sequences:
●
●
0001
0001
0000
0000
Use the RTC Alarm interrupt and inside the RTC interrupt routine, the RTC Alarm
and/or RTC Counter registers are updated.
Wait for SECF bit to be set in the RTC Control register. Update the RTC Alarm and/or
the RTC Counter register.
0003
0003
0002
0002
0001
FFFFFFFC
0001
0001
0000
0000
0003
0003
0002
0002
0002
FFFFFFFD
Doc ID 13902 Rev 9
0001
0001
0000
0000
0003
0003
0002
0002
0003
FFFFFFFE
0001
0001
Figure
0000
0000
0003
0003
156) are asserted on the last RTC
0002
0002
0004
FFFFFFFF
0001
0001
0000
0000
Real-time clock (RTC)
1 RTCCLK
1 RTCCLK
0003
0003
0002
0002
can be cleared by software
can be cleared by software
0005
0000
0001
0001
0000
0000
391/995
0003
0003