MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 571

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
Note:
SILM
31
15
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LBKM
Bits 29:26
30
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14
Bits 6:4 LEC[2:0]
CAN bit timing register (CAN_BTR)
Address offset: 0x1C
Reset value: 0x0123 0000
This register can only be accessed by the software when the CAN hardware is in
initialization mode.
Bit 31 SILM
Bit 30 LBKM
Bit 3
Bit 2 BOFF
Bit 1 EPVF: Error passive flag
Bit 0 EWGF
29
13
Reserved
0: Normal operation
1: Silent Mode
0: Loop Back Mode disabled
1: Loop Back Mode enabled
Reserved, forced by hardware to 0.
This field is set by hardware and holds a code which indicates the error condition of the last
error detected on the CAN bus. If a message has been transferred (reception or
transmission) without error, this field will be cleared to ‘0’.
Code 7 is unused and may be written by the hardware to check for an update
000: No Error
001: Stuff Error
010: Form Error
011: Acknowledgment Error
100: Bit recessive Error
101: Bit dominant Error
110: CRC Error
111: Set by software
Reserved, forced by hardware to 0.
This bit is set by hardware when it enters the bus-off state. The bus-off state is entered on
TEC overflow, greater than 255, refer to
This bit is set by hardware when the Error Passive limit has been reached (Receive Error
Counter or Transmit Error Counter>127).
This bit is set by hardware when the warning limit has been reached
(Receive Error Counter or Transmit Error Counter96).
28
12
Reserved
:
:
:
Silent mode (debug)
:
Bus-off flag
Loop back mode (debug)
Error warning flag
:
27
11
Last error code
26
10
25
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9
SJW[1:0]
Doc ID 13902 Rev 9
24
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8
Res.
23
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7
Section 22.7.6 on page
22
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6
TS2[2:0]
21
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5
BRP[9:0]
Controller area network (bxCAN)
20
rw
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4
558.
19
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3
18
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2
TS1[3:0]
17
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1
571/995
16
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0