MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 224

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Analog-to-digital converter (ADC)
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Bits 14:12 JEXTSEL[2:0]: External event select for injected group
Bits 10:9
Bits 7:4
Bit 11 ALIGN: Data alignment
Bit 8 DMA: Direct memory access mode
Bit 3 RSTCAL: Reset calibration
Bit 2 CAL: A/D Calibration
Note: Only ADC1 and ADC3 can generate a DMA request.
Note: If RSTCAL is set when conversion is ongoing, additional cycles are required to clear the
These bits select the external event used to trigger the start of conversion of an injected
group:
For ADC1 and ADC2 the assigned triggers are:
000: Timer 1 TRGO event
001: Timer 1 CC4 event
010: Timer 2 TRGO event
011: Timer 2 CC1 event
100: Timer 3 CC4 event
101: Timer 4 TRGO event
110: EXTI line15/TIM8_CC4 event (TIM8_CC4 is available only in High-density devices)
111: JSWSTART
For ADC3 the assigned triggers are:
000: Timer 1 TRGO event
001: Timer 1 CC4 event
010: Timer 4 CC3 event
011: Timer 8 CC2 event
100: Timer 8 CC4 event
101: Timer 5 TRGO event
110: Timer 5 CC4 event
111: JSWSTART
This bit is set and cleared by software. Refer to
0: Right Alignment
1: Left Alignment
Reserved, must be kept cleared.
This bit is set and cleared by software. Refer to the DMA controller chapter for more details.
0: DMA mode disabled
1: DMA mode enabled
This bit is set by software and cleared by hardware. It is cleared after the calibration registers
are initialized.
0: Calibration register initialized.
1: Initialize calibration register.
This bit is set by software to start the calibration. It is reset by hardware after calibration is
complete.
0: Calibration completed
1: Enable calibration
Reserved, must be kept cleared.
calibration registers.
Doc ID 13902 Rev 9
Figure
30.and
Figure 31.
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