MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 961

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
Table 200. JTAG debug port data registers (continued)
IR(3:0)
1010
1011
1000
Data register
[35 bits]
[35 bits]
ABORT
[35 bits]
DPACC
APACC
Debug port access register
This initiates a debug port and allows access to a debug port register.
– When transferring data IN:
– When transferring data OUT:
Refer to
Access port access register
Initiates an access port and allows access to an access port register.
– When transferring data IN:
– When transferring data OUT:
There are many AP Registers (see AHB-AP) addressed as the
combination of:
– The shifted value A[3:2]
– The current value of the DP SELECT register
Abort register
– Bits 31:1 = Reserved
– Bit 0 = DAPABORT: write 1 to generate a DAP abort.
Bits 34:3 = DATA[31:0] = 32-bit data to transfer for a write request
Bits 2:1 = A[3:2] = 2-bit address of a debug port register.
Bit 0 = RnW = Read request (1) or write request (0).
Bits 34:3 = DATA[31:0] = 32-bit data which is read following a read
request
Bits 2:0 = ACK[2:0] = 3-bit Acknowledge:
010 = OK/FAULT
001 = WAIT
OTHER = reserved
Bits 34:3 = DATA[31:0] = 32-bit data to shift in for a write request
Bits 2:1 = A[3:2] = 2-bit address (sub-address AP registers).
Bit 0 = RnW= Read request (1) or write request (0).
Bits 34:3 = DATA[31:0] = 32-bit data which is read following a read
request
Bits 2:0 = ACK[2:0] = 3-bit Acknowledge:
010 = OK/FAULT
001 = WAIT
OTHER = reserved
Doc ID 13902 Rev 9
Table 201
for a description of the A(3:2) bits
Details
Debug support (DBG)
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