MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 134

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Connectivity line devices: reset and clock control (RCC)
7.3.12
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31
15
rw
PLL3MUL[3:0]
30
14
rw
Bits 31:19 Reserved, always read as 0.
Bits 15:12 PLL3MUL[3:0]: PLL3 Multiplication Factor
Clock configuration register2 (RCC_CFGR2)
Address offset: 0x2C
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access
Bit 18 I2S3SRC: I2S3 clock source
Bit 17 I2S2SRC: I2S2 clock source
Bit 16 PREDIV1SRC: PREDIV1 entry clock source
7
29
13
rw
Set and cleared by software to select I2S3 clock source. This bit must be valid before
enabling I2S3 clock.
0: System clock (SYSCLK) selected as I2S3 clock entry
1: PLL3 VCO clock selected as I2S3 clock entry
Set and cleared by software to select I2S2 clock source. This bit must be valid before
enabling I2S2 clock.
0: System clock (SYSCLK) selected as I2S2 clock entry
1: PLL3 VCO clock selected as I2S2 clock entry
Set and cleared by software to select PREDIV1 clock source. This bit can be written only
when PLL is disabled.
0: HSE oscillator clock selected as PREDIV1 clock entry
1: PLL2 selected as PREDIV1 clock entry
Set and cleared by software to control PLL3 multiplication factor. These bits can be written
only when PLL3 is disabled.
00xx: Reserved
010x: Reserved
0110: PLL3 clock entry x 8
0111: PLL3 clock entry x 9
1000: PLL3 clock entry x 10
1001: PLL3 clock entry x 11
1010: PLL3 clock entry x 12
1011: PLL3 clock entry x 13
1100: PLL3 clock entry x 14
1101: Reserved
1110: PLL3 clock entry x 16
1111: PLL3 clock entry x 20
28
12
rw
27
11
rw
PLL2MUL[3:0]
26
10
rw
Reserved
25
rw
9
Doc ID 13902 Rev 9
24
rw
8
23
rw
7
PREDIV2[3:0]
22
rw
6
21
rw
5
20
rw
4
19
rw
3
I2S3S
PREDIV1[3:0]
RC
18
rw
rw
2
I2S2S
RC
17
rw
rw
1
RM0008
V1SRC
PREDI
16
rw
rw
0