MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 545

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
RM0008
Figure 193. Dual CAN block diagram (connectivity devices)
22.4
Master Control
Master Status
Tx Status
Rx FIFO 0 Status
Rx FIFO 1 Status
Interrupt Enable
Error Status
Bit Timing
Filter Master
Filter Mode
Filter Scale
Filter FIFO Assign
Filter Activation
Master Control
Master Status
Tx Status
Rx FIFO 0 Status
Rx FIFO 1 Status
Interrupt Enable
Error Status
Bit Timing
bxCAN operating modes
bxCAN has three main operating modes: initialization, normal and Sleep. After a
hardware reset, bxCAN is in Sleep mode to reduce power consumption and an internal pull-
up is active on CANTX. The software requests bxCAN to enter initialization or Sleep mode
by setting the INRQ or SLEEP bits in the CAN_MCR register. Once the mode has been
entered, bxCAN confirms it by setting the INAK or SLAK bits in the CAN_MSR register and
the internal pull-up is disabled. When neither INAK nor SLAK are set, bxCAN is in normal
mode. Before entering normal mode bxCAN always has to synchronize on the CAN bus.
CAN2 (Slave)
CAN 2.0B Active Core
CAN 2.0B Active Core
Doc ID 13902 Rev 9
CAN1 (Master) with 512 bytes SRAM
Note: CAN 2 start filter bank number n is configurable by writing to
Tx Mailboxes
Tx Mailboxes
Mailbox 0
Transmission
Transmission
Mailbox 0
Controller
Memory
Access
Scheduler
Scheduler
the CAN2SB[5:0] bits in the CAN_ FMR register.
Master
Slave
1
1
2
2
Controller area network (bxCAN)
Filter
Receive FIFO 0
Receive FIFO 0
Mailbox 0
Mailbox 0
M
a
Slave
t s
Master Filters
r e
(0 to n)
0
Acceptance Filters
1
1
1
2
2
2
3
Receive FIFO 1
Receive FIFO 1
Mailbox 0
Mailbox 0
..
M
Slave
Slave Filters
a
(n to 27)
t s
..
r e
26
1
1
ai16094
2
545/995
2
27

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