MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 406

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Window watchdog (WWDG)
18.4
18.5
406/995
How to program the watchdog timeout
Figure 160
watchdog counter (CNT) and the resulting timeout duration in milliseconds. This can be
used for a quick calculation without taking the timing variations into account. If more
precision is needed, use the formulae in
Figure 160. Window watchdog timing diagram
Debug mode
When the microcontroller enters debug mode (Cortex-M3 core halted), the WWDG counter
either continues to work normally or stops, depending on DBG_WWDG_STOP configuration
bit in DBG module. For more details, refer to
watchdog, bxCAN and I
The formula to calculate the timeout value is given by:
where:
Min-max timeout value @36 MHz (PCLK1)
Warning:
T
T
WWDG
PCLK1
WDGTB
shows the linear relationship between the 6-bit value to be loaded in the
0
1
2
3
T
: APB1 clock period measured in ms
: WWDG timeout
WWDG
When writing to the WWDG_CR register, always write 1 in the
T6 bit to avoid generating an immediate reset.
2
W[6:0]
=
C.
3Fh
T6 bit
Reset
T[6:0] CNT downcounter
T
Refresh not allowed
PCLK1
Doc ID 13902 Rev 9
Min timeout value

113 µs
227 µs
455 µs
910 µs
4096
Figure

2
Section 29.16.2: Debug support for timers,
Refresh window
WDGTB
160.


T 5:0


Max timeout value
+
time
1

14.56 ms
29.12 ms
58.25 ms
7.28 ms
;

ms

RM0008