MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 668

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Universal synchronous asynchronous receiver transmitter (USART)
25.3.7
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Figure 244. Mute mode using Idle line detection
Address mark detection (WAKE=1)
In this mode, bytes are recognized as addresses if their MSB is a ‘1’ else they are
considered as data. In an address byte, the address of the targeted receiver is put on the 4
LSB. This 4-bit word is compared by the receiver with its own address which is programmed
in the ADD bits in the USART_CR2 register.
The USART enters mute mode when an address character is received which does not
match its programmed address. In this case, the RWU bit is set by hardware. The RXNE flag
is not set for this address byte and no interrupt nor DMA request is issued as the USART
would have entered mute mode.
It exits from mute mode when an address character is received which matches the
programmed address. Then the RWU bit is cleared and subsequent bytes are received
normally. The RXNE bit is set for the address character since the RWU bit has been cleared.
The RWU bit can be written to as 0 or 1 when the receiver buffer contains no data (RXNE=0
in the USART_SR register). Otherwise the write attempt is ignored.
An example of mute mode behavior using address mark detection is given in
Figure 245. Mute mode using Address mark detection
Parity control
Parity control (generation of parity bit in transmission and parity checking in reception) can
be enabled by setting the PCE bit in the USART_CR1 register. Depending on the frame
length defined by the M bit, the possible USART frame formats are as listed in
In this example, the current address of the receiver is 1
(programmed in the USART_CR2 register)
RWU written to 1
(RXNE was cleared)
RWU
RWU
RWU written to 1
RX
RX
Data 1
IDLE
Non-matching address
Addr=0
Data 2
Data 1
Doc ID 13902 Rev 9
Mute Mode
Mute Mode
Data 3
Data 2
Data 4
IDLE
Idle frame detected
Matching address
Addr=1
IDLE
Data 3 Data 4
Normal Mode
RXNE
Non-matching address
Normal Mode
Data 5
Addr=2
RXNE
RXNE
Data 6
Mute Mode
Data 5
Figure
Table
RXNE
RM0008
245.
177.