MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 367

• Manufacturer Part Number: MCBSTM32EXL
• Description: BOARD EVALUATION FOR STM32F103ZE
• Manufacturer: Keil

Specifications of MCBSTM32EXL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RM0008
14.4.8
Output compare mode
OC4
CE
15
rw
14
rw
Bits 14:12 OC4M: Output compare 4 mode
IC4F[3:0]
Bits 9:8 CC4S: Capture/Compare 4 selection
Bits 6:4 OC3M: Output compare 3 mode
Bits 1:0 CC3S: Capture/Compare 3 selection
OC4M[2:0]
Capture/compare mode register 2 (TIMx_CCMR2)
Address offset: 0x1C
Reset value: 0x0000
Refer to the above CCMR1 register description.
Bit 15 OC4CE: Output compare 4 clear enable
Bit 11 OC4PE: Output compare 4 preload enable
Bit 10 OC4FE: Output compare 4 fast enable
Bit 7 OC3CE: Output compare 3 clear enable
Bit 3 OC3PE: Output compare 3 preload enable
Bit 2 OC3FE: Output compare 3 fast enable
13
rw
Note: CC4S bits are writable only when the channel is OFF (CC4E = ’0’ in TIMx_CCER).
Note: CC3S bits are writable only when the channel is OFF (CC3E = ’0’ in TIMx_CCER).
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC4 channel is configured as output.
01: CC4 channel is configured as input, IC4 is mapped on TI4.
10: CC4 channel is configured as input, IC4 is mapped on TI3.
11: CC4 channel is configured as input, IC4 is mapped on TRC. This mode is working only if
an internal trigger input is selected through TS bit (TIMx_SMCR register)
This bit-field defines the direction of the channel (input/output) as well as the used input.
00: CC3 channel is configured as output.
01: CC3 channel is configured as input, IC3 is mapped on TI3.
10: CC3 channel is configured as input, IC3 is mapped on TI4.
11: CC3 channel is configured as input, IC3 is mapped on TRC. This mode is working only if
an internal trigger input is selected through TS bit (TIMx_SMCR register)
12
rw
OC4
IC4PSC[1:0]
PE
11
rw
OC4
FE
10
rw
rw
9
CC4S[1:0]
Doc ID 13902 Rev 9
rw
8
OC3
CE.
rw
7
rw
6
IC3F[3:0]
OC3M[2:0]
rw
5
General-purpose timer (TIMx)
rw
4
OC3
IC3PSC[1:0]
PE
rw
3
OC3
FE
rw
2
rw
1
CC3S[1:0]
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rw
0