MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 93

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MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
RM0008
6.3.6
Note:
31
15
30
14
Bits 31:11
Reserved
AHB peripheral clock enable register (RCC_AHBENR)
Address offset: 0x14
Reset value: 0x0000 0014
Access: no wait state, word, half-word and byte access
When the peripheral clock is not active, the peripheral register values may not be readable
by software and the returned value is always 0x0.
Bit 5 TIM7RST: Timer 7 reset
Bit 4 TIM6RST: Timer 6 reset
Bit 3 TIM5RST: Timer 5 reset
Bit 2 TIM4RST: Timer 4 reset
Bit 1 TIM3RST: Timer 3 reset
Bit 0 TIM2RST: Timer 2 reset
29
13
Reserved, always read as 0.
Set and cleared by software.
0: No effect
1: Reset timer 7
Set and cleared by software.
0: No effect
1: Reset timer 6
Set and cleared by software.
0: No effect
1: Reset timer 5
Set and cleared by software.
0: No effect
1: Reset timer 4
Set and cleared by software.
0: No effect
1: Reset timer 3
Set and cleared by software.
0: No effect
1: Reset timer 2
28
12
27
11
SDIO
EN
26
10
rw
Low-, medium- and high-density reset and clock control (RCC)
Res.
25
9
Doc ID 13902 Rev 9
FSMC
EN
24
rw
8
Reserved
Res.
23
7
CRCE
22
rw
N
6
Res.
21
5
FLITF
EN
20
rw
4
Res.
19
3
SRAM
EN
18
rw
2
DMA2
EN
17
rw
1
93/995
DMA1
EN
16
rw
0

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