MCBSTM32EXL Keil, MCBSTM32EXL Datasheet - Page 118

no-image

MCBSTM32EXL

Manufacturer Part Number
MCBSTM32EXL
Description
BOARD EVALUATION FOR STM32F103ZE
Manufacturer
Keil
Datasheets

Specifications of MCBSTM32EXL

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity line devices: reset and clock control (RCC)
7.3.3
118/995
Res.
31
15
Bits 1:0 SW[1:0]: System clock Switch
RDYIE
PLL3
30
14
rw
Bits 31:24 Reserved, always read as 0.
Clock interrupt register (RCC_CIR)
Address offset: 0x08
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access
Bit 23 CSSC: Clock security system interrupt clear
Bit 22 PLL3RDYC: PLL3 Ready Interrupt Clear
Bit 21 PLL2RDYC: PLL2 Ready Interrupt Clear
Bit 20 PLLRDYC: PLL ready interrupt clear
Bit 19 HSERDYC: HSE ready interrupt clear
RDYIE
PLL2
Set and cleared by software to select SYSCLK source.
Set by hardware to force HSI selection when leaving Stop and Standby mode or in case of failure of
the HSE oscillator used directly or indirectly as system clock (if the Clock Security System is
enabled).
00: HSI selected as system clock
01: HSE selected as system clock
10: PLL selected as system clock
11: Not allowed
29
13
rw
RDYIE
PLL
This bit is set by software to clear the CSSF flag.
0: No effect
1: Clear CSSF flag
This bit is set by software to clear the PLL3RDYF flag.
0: No effect
1: Clear PLL3RDYF flag
This bit is set by software to clear the PLL2RDYF flag.
0: No effect
1: Clear PLL2RDYF flag
This bit is set by software to clear the PLLRDYF flag.
0: No effect
1: Clear PLLRDYF flag
This bit is set by software to clear the HSERDYF flag.
0: No effect
1: Clear HSERDYF flag
28
12
rw
Reserved
RDYIE
HSE
27
11
rw
RDYIE
HSI
26
10
rw
RDYIE
LSE
25
rw
9
Doc ID 13902 Rev 9
RDYIE
LSI
24
rw
8
CSSC
CSSF
23
w
7
r
RDYC
RDYF
PLL3
PLL3
22
w
6
r
RDYC
RDYF
PLL2
PLL2
21
w
5
r
RDYC
RDYF
PLL
PLL
20
w
4
r
RDYC
RDYF
HSE
HSE
19
w
3
r
RDYC
RDYF
HSI
HSI
18
w
2
r
RDYC
RDYF
LSE
LSE
17
w
1
r
RM0008
RDYC
RDYF
LSI
LSI
16
w
0
r

Related parts for MCBSTM32EXL