HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1004

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

25.3.7
HACTSR is a 32-bit read/write register that indicates the status of the HAC TX controller. Writing
0 to the bit will initialize it.
Initial value:
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 920 of 1330
REJ09B0554-0200
Bit
31
30
29
28
27 to 10 ⎯
R/W:
R/W:
Bit:
Bit:
TX Status Register (HACTSR)
Bit Name
CMDAMT
CMDDMT
PLTFRQ
PRTFRQ
CMD
AMT
R/W
31
15
R
1
0
-
CMD
DMT
R/W
30
14
-
R
1
0
FRQ
R/W
PLT
29
13
R
1
0
-
1
1
1
1
All 0
Initial Value
FRQ
PRT
R/W
28
12
R
1
0
-
27
11
R
R
0
0
-
-
R/W*
R/W
R/W
R/W
R/W
R
26
10
R
R
-
0
-
0
FUN
PLT
R/W
2
25
R
-
0
9
0
Description
Command Address Empty
0: CSAR Tx buffer contains untransmitted data.
1: CSAR Tx buffer is empty and ready to store
For details of HAC initialization steps, see the
operational flow in 25.5.5.
Command Data Empty
0: CSDR Tx buffer contains untransmitted data.
1: CSDR Tx buffer is empty and ready to store
PCML TX Request
0: PCML Tx buffer contains untransmitted data.
1: PCML TX buffer is empty and needs to store
PCMR TX Request
0: PCMR Tx buffer contains untransmitted data.
1: PCMR TX buffer is empty and needs to store
Reserved
Always 0 for read and write.
PRT
FUN
R/W
24
R
0
8
0
-
data.*
data. *
data. In DMA mode, writing to HACPCML will
automatically clear this bit to 0.
data. In DMA mode, writing to HACPCMR will
automatically clear this bit to 0.
23
R
R
0
7
0
-
-
1
1
22
R
R
0
0
6
-
-
21
R
R
0
5
0
-
-
20
R
R
0
4
0
-
-
19
R
R
0
3
-
0
-
18
R
R
0
2
0
-
-
17
R
R
0
1
-
0
-
16
R
R
0
0
0
-
-