HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 728

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
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Legend:
18.3.10 Serial Control 2 Register (SISC2R)
SISC2R is an 8-bit readable/writable register that enables or disables receive data full interrupt
(SIMRXI) requests.
Rev. 2.00 Feb. 12, 2010 Page 644 of 1330
REJ09B0554-0200
Bit
1
0
Bit
7
6 to 0
Bit Name
RST
SMIF
Bit
Name
EIO
etu: Elementary time unit
Initial
Value
0
1
Initial
Value
0
All 0
Initial value:
R/W:
R/W
R/W
R/W
Bit:
R/W
R/W
R
R/W
EIO
7
0
Description
Smart Card Reset
Controls the output of the SIM_RST pin of the smart card
interface.
0: The SIM_RST pin of the smart card interface outputs low
1: The SIM_RST pin of the smart card interface outputs high
Smart Card Interface Mode Select
This bit is always read as 1. The write value should also always
be 1.
level.
level.
Description
Error Interrupt Only
When the EIO bit is 1, even if the RIE bit is set to 1, a
receive data full interrupt (SIMRXI) request is not sent to
the CPU. When the DMAC is used with this setting, the
CPU processes only SIMERI requests.
Receive data full interrupt (SIMRXI) requests are enabled
or disabled by the RIE bit setting.
Reserved
These bits are always read as 0. The write value should
also always be 0.
R
6
0
-
R
5
0
-
R
4
0
-
R
3
-
0
R
2
0
-
R
0
1
-
0
-
0
R

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