HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1409

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
F.
F.1
(1) Turn on the power supply of I/O, and CPG to the same timing as the power supply VDDQ.
(2) After turning on a power supply to VDDQ or simultaneously, the input signal to pin (RESET,
(3) Turn on the power supply so that the voltage of a power supply VDD may keep less than 1.2 V
(4) It recommends that a power supply to VDDQ is in advance, and a power supply to VDD is
(5) In addition to the above (1), (2), (3), (4), and following (i), (ii), follow “F.3, The Ratings for
MRESET, MD0-MD10, external clock, and etc) must be input. If any signal is input to the LSI
pin before the power supply turns on the LSI may be damaged.
(i) Make the RESET signal into the Low level at the power supply VDDQ.
until the voltage of a power supply VDDQ reaches 2 V to avoid an abnormal oscillation of the
PLL1/2/3 circuit.
behind.
Power-on and Power-off”.
(i) In the case of this LSI simple substance, the power supply sequence of a power supply to
(ii) When this LSI is connected with other elements on the mounting board, please keep that
VDDQ and VDD does not have time restrictions. Refer to figure F.1. In addition, it
recommends performing a power-on procedure at the shortest possible time.
–0.3 V < Vin < VDDQ +0.3 V.
Moreover, as shown in figure F.2, power up time (tpwu) until it goes up from the following
condition (A) to an operation voltage value {VDDQ (min), VDD (min)} is 100 ms (max).
If it is longer than that time, the LSI may be damaged.
In addition, it recommends performing a power-on procedure at the shortest possible time.
Condition (A): VDDQ ≥ 1.0 V or VDD ≥ 0.5 V
Power-on and Power-off Procedures
Power-on Procedure
Rev. 2.00 Feb. 12, 2010 Page 1325 of 1330
REJ09B0554-0200

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