HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 846

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
Bit
31 to 4
3 to 0
21.3.11 Bulk Head ED Pointer Register (HcBulkHeadED)
HcBulkHeadED stores the address of the first ED to be processed in the bulk list.
Initial value:
Initial value:
Bit
31 to 4
3 to 0
21.3.12 Bulk Current ED Pointer Register (HcBulkCurrentED)
HcBulkCurrentED stores the address of the ED to be processed in the current frame in the bulk
list.
Initial value:
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 762 of 1330
REJ09B0554-0200
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
Bit Name
CCED
R/W
R/W
Bit Name
BHED
R/W
R/W
31
15
31
15
0
0
0
0
R/W
R/W
R/W
R/W
30
14
30
14
0
0
0
0
R/W
R/W
R/W
R/W
29
13
29
13
0
0
0
0
Initial Value
All 0
All 0
Initial Value
All 0
All 0
R/W
R/W
R/W
R/W
28
12
28
12
0
0
0
0
R/W
R/W
R/W
R/W
27
11
27
11
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R
26
10
26
10
0
0
0
0
BHED
BCED
R/W
R/W
R/W
R/W
25
25
0
9
0
0
9
0
Description
Control Current ED Address
These bits store the start address of the control list
to be processed in the current frame.
Reserved
These bits are always read as 0. Always write 0 to
this bit.
Description
These bits store the start address of the bulk list.
Reserved
These bits are always read as 0. Always write 0 to
this bit.
Bulk Head ED Address
R/W
R/W
R/W
R/W
24
24
0
8
0
0
8
0
BHED
BCED
R/W
R/W
R/W
R/W
23
23
0
7
0
0
7
0
R/W
R/W
R/W
R/W
22
22
0
0
0
6
0
6
R/W
R/W
R/W
R/W
21
21
0
5
0
0
5
0
R/W
R/W
R/W
R/W
20
20
0
4
0
0
4
0
R/W
R/W
19
19
0
3
0
R
0
3
0
R
-
-
R/W
R/W
18
18
0
2
-
0
R
0
2
-
0
R
R/W
R/W
17
17
0
1
0
R
0
1
0
R
-
-
R/W
R/W
16
16
0
0
0
R
0
0
0
R
-
-

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