HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 752

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 19 I
19.3.2
The status bits (bit 0 to bit 6) of the slave status register are cleared by writing 0 to the respective
status bit positions in the receive status state. Each bit is held at 1 until reset by a write of 0;
however, the GCAR and STM bits are the exception.
Initial value:
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 668 of 1330
REJ09B0554-0200
Bit
0
R/W:
R/W:
Bit:
Bit:
Bit Name
FNA
Slave Status Register (ICSSR)
31
15
2
R
R
0
0
-
-
C Bus Interface
30
14
-
R
-
R
0
0
29
13
R
R
0
0
-
-
Initial Value
0
28
12
R
R
0
0
-
-
27
11
R
R
0
0
-
-
R/W
R/W
26
10
R
R
0
0
-
-
25
R
R
-
0
9
-
0
Description
Force Non-Acknowledge
In the slave receiver mode, the level on the FNA
bit is sent to the transmitter as the acknowledge
signal. FNA is 0 while the data packet is being
received, and set to 1 on completion of data
reception.
The force non-acknowledge is sent to the master
during slave reception.
After having received the last required byte in a
data packet, the slave communicates to the
master with not driving acknowledge (NACK). The
master issues a stop on to the bus after receiving
a NACK. Setting FNA to 1 will not effect the
acknowledging of slave addresses.
This I
returns NACK by FNA = 1 in order to handle an
error associated with system failure. Therefore,
the low period of SCL is not extended for returning
NACK. The FNA value on reception of the last bit
of one byte determines whether or not the slave
receiver returns NACK. Namely, to have the slave
return NACK after transfer of a specific byte, FNA
must be set to 1 on completion of the transfer of
the preceding byte.
24
R
R
0
8
0
-
-
2
C module assumes that the slave receiver
23
R
R
0
7
0
-
-
GCAR
22
R
R
0
6
0
-
STM
21
R
R
0
5
0
-
SSR
R/W*
20
R
0
4
0
-
SDE
R/W*
19
R
0
3
0
-
SDT
R/W*
18
R
0
2
0
-
R/W*
SDR
17
R
0
1
0
-
SAR
R/W*
16
R
0
0
0
-