HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 344

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
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10.5.1
BCR1 is a 32-bit readable/writable register that specifies the function, bus cycle status, etc., of
each area. Do not access off-chip memory space other than area 0 until register initialization is
complete.
Initial value:
Initial value:
Bit
31
30
29
28, 27
Rev. 2.00 Feb. 12, 2010 Page 260 of 1330
REJ09B0554-0200
R/W:
R/W:
Bit:
Bit:
Bit
Name
ENDIAN
A0MPX
Bus Control Register 1 (BCR1)
MEM
END
R/W
IAN
HIZ
0/1
31
15
R
0
CNT
HIZ
RW
30
14
-
R
0
0
Initial
Value
0/1
0
0/1
All 0
BST2
A0M
R/W
PX
0/1
A0
29
13
R
0
BST1
R/W
A0
28
12
R
0
0
-
R/W
R
R
R
R
BST0
R/W
A0
27
11
R
0
0
-
DPUP
BST2
R/W
R/W
A5
26
10
0
0
Description
Endian Flag
The value of the endian setting off-chip pin (MD5) is
sampled at a power-on reset by the RESET pin. This bit
determines the endian mode of all spaces.
0: Indicates that pin MD5 is low at a power-on reset and
1: Indicates that pin MD5 is high at a power-on reset and
Reserved
This bit is always read as 0. The write value should
always be 0.
Area 0 Memory Type
The value of the area 0 memory type setting off-chip pin
(MD6) is sampled at a power-on reset by the RESET pin.
This bit determines the memory type of area 0.
0: Indicates that pin MD6 is high and area 0 is specified
1: Indicates that pin MD6 is low, and area 0 is specified
Reserved
These bits are always read as 0. The write value should
always be 0.
BST1
R/W
A5
big-endian mode is specified for this LSI.
little-endian mode is specified for this LSI.
as SRAM interface
as MPX interface
25
R
-
0
9
0
OPUP
BST0
R/W
R/W
A5
24
0
8
0
BST2
R/W
A6
23
R
0
7
0
-
BST1
R/W
22
A6
R
0
0
6
-
MBC
BST0
R/W
R/W
A1
21
A6
0
5
0
MTP2
DRA
MBC
R/W
R/W
20
A4
0
4
0
BREQ
MTP1
DRA
R/W
R/W
EN
19
0
3
0
MTP0
DRA
R/W
18
R
0
2
0
MEM
MPX
R/W
17
R
0
1
0
-
PCM
DMA
R/W
BST
A56
R/W
16
0
0
0

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