HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 755

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

19.3.3
Initial value:
Initial value:
Bit
31 to 5
4
3
2
1
0
R/W:
R/W:
Bit:
Bit:
Slave Interrupt Enable Register (ICSIER)
Bit Name
⎯
SSRE
SDEE
SDTE
SDRE
SARE
31
15
R
R
0
0
-
-
30
14
R
R
-
-
0
0
29
13
R
R
0
0
-
-
Initial Value
All 0
0
0
0
0
0
28
12
R
R
0
0
-
-
27
11
R
R
0
0
-
-
R
R/W
R/W
R/W
R/W
R/W
R/W
26
10
R
R
-
0
-
0
25
R
R
-
0
9
-
0
Description
Reserved
These bits are always read as 0, and the write
value should always be 0.
Slave Stop Receive Interrupt Enable
0: The SSR interrupt is disabled
1: The SSR interrupt is enabled
Slave Data Empty Interrupt Enable
0: The SDE interrupt is disabled
1: The SDE interrupt is enabled
Slave Data Transmit Interrupt Enable
0: The SDT interrupt is disabled
1: The SDT interrupt is enabled
Slave Data Receive Interrupt Enable
0: The SDR interrupt is disabled
1: The SDR interrupt is enabled
Slave Address Receive Interrupt Enable
0: The SAR interrupt is disabled
1: The SAR interrupt is enabled
24
R
R
0
8
0
-
-
23
R
R
0
7
0
-
-
Rev. 2.00 Feb. 12, 2010 Page 671 of 1330
22
R
R
0
6
-
0
-
21
R
R
0
5
-
0
-
SSRE
R/W
20
Section 19 I
R
4
0
0
-
SDEE
R/W
19
R
0
3
0
-
REJ09B0554-0200
SDTE SDRE SARE
R/W
18
R
0
2
0
-
2
C Bus Interface
R/W
17
R
0
1
0
-
R/W
16
R
0
0
0
-