HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 832

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

21.3.1
HcRevision stores the version number of the host controller interface specifications.
Initial value:
Initial value:
21.3.2
HcControl defines the operation mode for HC. The bits of this register, except for HCFS and
RWC, are modified only by HCD.
Initial value:
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 748 of 1330
REJ09B0554-0200
Bit
31 to 8
7 to 0
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
Host Controller Interface Revision Register (HcRevision)
Control Register (HcControl)
Bit Name
⎯
REV
31
15
31
15
R
R
R
R
0
0
0
0
-
-
-
-
30
14
30
14
-
R
-
R
-
R
-
R
0
0
0
0
29
13
29
13
R
R
R
R
0
0
0
0
-
-
-
-
Initial Value
All 0
H'10
28
12
28
12
R
R
R
R
0
0
0
0
-
-
-
-
27
11
27
11
R
R
R
R
0
0
0
0
-
-
-
-
RWE
R/W
R/W
R
R
26
10
26
10
R
R
R
-
0
-
0
-
0
0
RWC
R/W
25
25
R
R
R
-
0
9
-
0
-
0
9
0
Description
Reserved
These bits are always read as 0. Always write 0 to
these bits.
OpenHCI Revision
H'10: Indicates the OpenHCI specification version
1.0.
R/W
24
24
IR
R
R
R
0
8
0
0
8
0
-
-
-
HCFS1 HCFS0
R/W
23
23
R
R
R
0
7
0
0
7
0
-
-
R/W
22
22
R
R
R
0
0
0
6
0
6
-
-
R/W
BLE
21
21
R
R
R
0
5
0
0
5
0
-
-
R/W
CLE
20
20
R
R
R
0
4
1
0
4
0
-
-
REV
R/W
19
19
IE
R
R
R
0
3
0
0
3
0
-
-
PLE
R/W
18
18
R
R
R
0
2
0
0
2
0
-
-
CBSR1 CBSR0
R/W
17
17
R
R
R
0
1
0
0
1
0
-
-
R/W
16
16
R
R
R
0
0
0
0
0
0
-
-