HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 721

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
6
Bit
Name
RDRF
Initial
Value
0
R/W
R/W
Description
Receive Data Register Full
Indicates that received data is stored in SIRDR*
0: Indicates that no valid received data is stored in SIRDR.
[Clearing Conditions]
•
•
•
1: Indicates that valid received data is stored in SIRDR.
[Setting Condition]*
•
Notes: 1. In the T = 0 mode, when the receiver detects a
On reset
When data is read from SIRDR
When 0 is written to the RDRF bit
When serial reception is completed normally, and
received data is transferred from SIRSR to SIRDR.
2. Writing 1 will retain the original value.
parity error, it retains the previous state without
affecting the SIRDR contents and RDRF flag.
On the other hand, in the T = 1 mode, when the
receiver detects a parity error, it transfers the
received data to SIRDR, and sets the RDRF flag to
1.
In both the T = 0 and T = 1 modes, clearing the RE
bit in SISCR to 0 will retain the previous state
without affecting the SIRDR contents and RDRF
flag.
2
Rev. 2.00 Feb. 12, 2010 Page 637 of 1330
REJ09B0554-0200
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