HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 954

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

24.2
The PFC has the following set of registers. For details of the addresses of these registers and the
states in each operating mode, see section 32, List of Registers.
Table 24.2 Register Configuration (1)
Register Name
Input pin pull-up control register
DMA pin control register
SCIF Hi-Z control register
Peripheral module select register
Port A pull-up control register
Port B pull-up control register
Port C pull-up control register
Port D pull-up control register
Port E pull-up control register
Port F pull-up control register
Port G pull-up control register
Port H pull-up control register
Port J pull-up control register
Port K pull-up control register
Mode pin pull-up control register
Mode select register
Port A control register
Port B control register
Port C control register
Port D control register
Port E control register
Port F control register
Port G control register
Port H control register
Port J control register
Port K control register
Port A data register
Rev. 2.00 Feb. 12, 2010 Page 870 of 1330
REJ09B0554-0200
Register Descriptions
Abbrev.
INPUPA
DMAPCR R/W
SCIHZR
IPSELR
PAPUPR
PBPUPR
PCPUPR
PDPUPR
PEPUPR
PFPUPR
PGPUPR
PHPUPR
PJPUPR
PKPUPR
MDPUPR R/W
MODSELR R/W
PACR
PBCR
PCCR
PDCR
PECR
PFCR
PGCR
PHCR
PJCR
PKCR
PADR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
P4 Address
H'FE40 0028
H'FE40 002C
H'FE40 0030
H'FE40 0034
H'FE40 0080
H'FE40 0084
H'FE40 0088
H'FE40 008C
H'FE40 0090
H'FE40 0094
H'FE40 0098
H'FE40 009C
H'FE40 00A0
H'FE40 00A4
H'FE40 00A8
H'FE40 00AC
H'FE40 0000
H'FE40 0004
H'FE40 0008
H'FE40 000C
H'FE40 0010
H'FE40 0014
H'FE40 0018
H'FE40 001C
H'FE40 0020
H'FE40 0024
H'FE40 0040
Area 7 Address Size
H'1E40 0028
H'1E40 002C
H'1E40 0030
H'1E40 0034
H'1E40 0080
H'1E40 0084
H'1E40 0088
H'1E40 008C
H'1E40 0090
H'1E40 0094
H'1E40 0098
H'1E40 009C
H'1E40 00A0
H'1E40 00A4
H'1E40 00A8
H'1E40 00AC
H'1E40 0000
H'1E40 0004
H'1E40 0008
H'1E40 000C
H'1E40 0010
H'1E40 0014
H'1E40 0018
H'1E40 001C
H'1E40 0020
H'1E40 0024
H'1E40 0040
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
16
16
16
16
16
16
16
16
16
16
8
Sync
Clock
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck