HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 577

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

12.4
The CPG has the following registers. For details on the addresses of these registers and the state of
registers in each operating mode, see section 32, List of Registers.
Table 12.4 Register Configuration (1)
Register Name
Frequency control register
Clock division register
Module clock control register
Table 12.4 Register Configuration (2)
Register Name
Frequency control register
Clock division register
Module clock control register
Notes: 1. The initial values of bits 11 to 9 are 1, and those of bits 8 to 0 are undefined.
2. After exiting hardware standby mode, this LSI enters the power-on reset state caused
Register Descriptions
by the RESET pin.
Abbrev.
FRQCR
DCKDR
MCKCR
FRQCR
DCKDR
MCKCR
Abbrev.
R/W
R/W
R/W
R/W
H'0000 0001
H'0000 0000
Power-on
Reset
by
RESET
Pin
*
1
P4 Address
H'FFC0 0000
H'FE0A 0020
H'FE0A 0024
Retained
by
WDT/
H-UDI
Retained
Retained
Retained
Manual
Reset by
RESET
Pin/WDT/
Multiple
Exception
Rev. 2.00 Feb. 12, 2010 Page 493 of 1330
Area 7 Address Size
H'1FC0 0000
H'1E0A 0024
H'1E0A 0020
Retained
Retained
Retained
Sleep
by Sleep
Instruction/
Deep Sleep
by
Hardware
REJ09B0554-0200
16
32
32
*
2
Standby
Retained
Retained
Retained
by
Software/
Each
Module
Pck
Sync
Clock
Pck
Pck