HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 164

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Table 4.8
Instruction
CLRMAC
CLRS
CLRT
LDC
LDC
LDC
LDC
LDC
LDC
LDC
LDC.L
LDC.L
LDC.L
LDC.L
LDC.L
LDC.L
LDC.L
LDS
LDS
LDS
LDS.L
LDS.L
LDS.L
LDTLB
MOVCA.L R0,@Rn
NOP
OCBI
OCBP
OCBWB
PREF
RTE
Rev. 2.00 Feb. 12, 2010 Page 80 of 1330
REJ09B0554-0200
Rm,SR
Rm,GBR
Rm,VBR
Rm,SSR
Rm,SPC
Rm,DBR
Rm,Rn_BANK
@Rm+,SR
@Rm+,GBR
@Rm+,VBR
@Rm+,SSR
@Rm+,SPC
@Rm+,DBR
@Rm+,Rn_BANK
Rm,MACH
Rm,MACL
Rm,PR
@Rm+,MACH
@Rm+,MACL
@Rm+,PR
@Rn
@Rn
@Rn
@Rn
System Control Instructions
Operation
0 → MACH, MACL
0 → S
0 → T
Rm → SR
Rm → GBR
Rm → VBR
Rm → SSR
Rm → SPC
Rm → DBR
Rm → Rn_BANK (n = 0 to 7)
(Rm) → SR, Rm + 4 → Rm
(Rm) → GBR, Rm + 4 → Rm
(Rm) → VBR, Rm + 4 → Rm
(Rm) → SSR, Rm + 4 → Rm
(Rm) → SPC, Rm + 4 → Rm
(Rm) → DBR, Rm + 4 → Rm
(Rm) → Rn_BANK,
Rm + 4 → Rm
Rm → MACH
Rm → MACL
Rm → PR
(Rm) → MACH, Rm + 4 → Rm
(Rm) → MACL, Rm + 4 → Rm
(Rm) → PR, Rm + 4 → Rm
PTEH/PTEL → TLB
R0 → (Rn) (without fetching
cache block)
No operation
Invalidates operand cache block 0000nnnn10010011 —
Writes back and invalidates
operand cache block
Writes back operand cache block0000nnnn10110011 —
(Rn) → operand cache
Delayed branch, SSR/SPC →
SR/PC
Instruction Code
0000000000101000 —
0000000001001000 —
0000000000001000 —
0100mmmm00001110 Privileged
0100mmmm00011110 —
0100mmmm00101110 Privileged
0100mmmm00111110 Privileged
0100mmmm01001110 Privileged
0100mmmm11111010 Privileged
0100mmmm1nnn1110 Privileged
0100mmmm00000111 Privileged
0100mmmm00010111 —
0100mmmm00100111 Privileged
0100mmmm00110111 Privileged
0100mmmm01000111 Privileged
0100mmmm11110110 Privileged
0100mmmm1nnn0111 Privileged
0100mmmm00001010 —
0100mmmm00011010 —
0100mmmm00101010 —
0100mmmm00000110 —
0100mmmm00010110 —
0100mmmm00100110 —
0000000000111000 Privileged
0000nnnn11000011 —
0000000000001001 —
0000nnnn10100011 —
0000nnnn10000011 —
0000000000101011 Privileged
Privileged
T Bit
—
—
0
LSB
—
LSB
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—