HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 640

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Notes: n = 3 to 0
Rev. 2.00 Feb. 12, 2010 Page 556 of 1330
REJ09B0554-0200
Bit
11, 10
9, 8
7
6
5
4
3
2
1
0
* The source clock is the peripheral clock (Pck). The clock which divided from the source
Bit Name
CC1
CC0
SI3
SI2
SI1
SI0
OP3
OP2
OP1
OP0
clock is the timer/counter resolution of the channel.
Initial Value
All 0
All 0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
These bits specify the clock input for the 16-bit
timer/counter in channel 1.*
00: Clock for timer 1 is 1/32 of source clock
01: Clock for timer 1 is 1/128 of source clock
10: Clock for timer 1 is 1/512 of source clock
11: Clock for timer 1 is 1/1024 of source clock
Set the same value as the CC0 bit when using 16-
bit input capture mode.
Free-Running Timer Clock Control
This clock is used for the 32-bit free-running timer
(FRT) and also for the 16-bit timer/counter in
channel 0.*
00: Clock for FRT and timer 0 is 1/32 of source
01: Clock for FRT and timer 0 is 1/128 of source
10: Clock for FRT and timer 0 is 1/512 of source
11: Clock for FRT and timer 0 is 1/1024 of source
Channel 3 to 0 Stop Ignore
For the channel n, these bits determine whether in
output compare mode with 32-bit free-running
timer mode, the output remains active for half the
maximum time or until the stop value is reached.
0: Output remains active until the channel n stop
1: Output remains active for half the total time of
Channel 3 to 0 Operation
For the channel n, if in timer mode, these bits
determine whether the timer is used in output
compare or input capture mode.
0: Input capture mode
1: Output compare mode
When a channel is in output compare mode, the
corresponding IEEn bits has to be set to 0.
Timer Clock Control Channel 1
time value is reached
the FRT
clock
clock
clock
clock