HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 797

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
11
10
9
Bit Name
SPDP
SDTA
PDTA
Initial Value
0
0
0
R/W
R/W
R/W
R/W
Description
Serial Padding Polarity
This bit is ignored if CPEN = 1.
0: Padding bits are low
1: Padding bits are high
Note: When MUEN = 1, the padding bits will be
Serial Data Alignment
This bit is ignored if CPEN = 1.
0: Serial data is transmitted/ received first,
1: Padding bits are transmitted/ received first,
Parallel Data Alignment
This bit is ignored if CPEN = 1.
If the data word length = 32, 16 or 8 then this bit
has no meaning.
This bit is applied to SSIRDR in receive mode and
to SSITDR in transmit mode.
0: Parallel data (SSITDR or SSIRDR) is left
1: Parallel data (SSITDR or SSIRDR) is right
•
•
followed by padding bits.
followed by serial data.
aligned
aligned
DWL = 000 (data word length: 8 bits), PDTA
ignored
All data bits in SSIRDR or SSITDR are used
on the audio serial bus. Four data words are
transmitted/received in each 32-bit access.
The first data word is stored in bits 7 to 0, the
second from bits 15 to 8, the third from bits 23
to 16 and the last data word is stored in bits
31 to 24.
DWL = 001 (data word length: 16 bits), PDTA
ignored
All data bits in SSIRDR or SSITDR are used
on the audio serial bus. Two data words are
transmitted/received in each 32-bit access.
The first data word is stored in bits 15 to 0 and
the second data word is stored in bits 31 to
16.
at the low level. (The muting function
takes priority.)
Rev. 2.00 Feb. 12, 2010 Page 713 of 1330
REJ09B0554-0200