HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 910

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
Note: * A write of 1 only is allowed to the Mailbox designated for transmission.
• CANTXPR0
Initial value:
Note: * A write of 1 only is allowed for the Mailbox designated for transmission.
Rev. 2.00 Feb. 12, 2010 Page 826 of 1330
REJ09B0554-0200
Bit
15 to 0
Bit
15 to 1
0
R/W:
Bit:
Bit Name
TXPR1[15:0]
Bit Name
TXPR0[15:1]
TXPR0
R/W*
_15
15
0
TXPR0
R/W*
_14
14
0
TXPR0
R/W*
_13
13
0
Initial Value
All 0
Initial Value
All 0
0
TXPR0
R/W*
_12
12
0
TXPR0
R/W*
_11
11
0
TXPR0
R/W*
_10
10
0
R/W
R/W*
R/W
R/W*
R
TXPR0
R/W*
_9
9
0
TXPR0
R/W*
_8
8
0
Description
Indicates that the corresponding Mailbox is
requested to transmit a CAN Frame. Bit15 to 0
correspond to Mailboxes 31 to 16, respectively.
When multiple bits are set, the order of the
transmissions is governed by the MCR2 (CAN
ID or Mailbox number.
0: Transmit message idle state in
Description
Indicating that the corresponding Mailbox is
requested to transmit a CAN Frame. Bits15 to 1
correspond to Mailboxes 15 to 1, respectively.
When multiple bits are set, the order of the
transmission is governed by the MCR2 (CAN-
ID or Mailbox number).
0: Transmit message idle state in
Reserved
This bit is always 0 as this Mailbox is receive-
only. Writing a 0 to this bit has no effect. The
read value is not guaranteed.
1: Transmission request made fo
1: Transmission request for the
corresponding mailbox.
Clearing condition: Completion of message
transmission or message transmission
abortion (automatically cleared)
corresponding Mailbox
corresponding mailbox.
Clearing condition: Completion of message
transmission or message transmission
abortion (automatically cleared)
corresponding mailbox
TXPR0
R/W*
_7
7
0
TXPR0
R/W*
_6
0
6
TXPR0
R/W*
_5
5
0
TXPR0
R/W*
_4
4
0
TXPR0
R/W*
_3
3
0
TXPR0
R/W*
_2
2
0
TXPR0
R/W*
_1
1
0
R
0
0
-

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