HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 638

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
16.3.2
Initial value:
Initial value:
16.3.3
CMTCTL is a 32-bit readable/writable register that controls interrupts, makes settings for the
clocks, and selects the operating mode.
Initial value:
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 554 of 1330
REJ09B0554-0200
Bit
31 to 0
Bit
31
30
29
28
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
Free-Running Timer (CMTFRT)
Bit Name
FRT
Control Register (CMTCTL)
Bit Name
TE3
TE2
TE1
TE0
R/W
R/W
TE3
31
15
31
15
R
R
0
0
0
0
CC3
TE2
R/W
R/W
30
14
30
14
R
R
0
0
0
0
TE1
R/W
R/W
29
13
29
13
R
R
0
0
0
0
Initial Value
0
0
0
0
CC2
Initial Value
All 0
TE0
R/W
R/W
28
12
28
12
R
R
0
0
0
0
IOE3 IOE2
R/W
R/W
27
11
27
11
0
R
0
R
0
0
CC1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
26
10
26
10
R
R
0
0
0
0
R/W
R
IOE1 IOE0 ICE3
R/W
R/W
25
25
0
R
0
R
0
0
9
9
CC0
Description
Timer Enable
Enables the counting of each of the 16-bit
counters. If these bits are inactive when operating
in timer mode or in counter mode, the counters
are reset to 0.
In updown-counter mode, a counter for each pair
(counter 1 or counter 3) needs to be disabled
(TE1=0, TE3=0).
0: Counting disabled; counter will be reset to
1: Counter is incremented
R/W
R/W
24
24
R
R
0
0
0
0
8
8
H'000
Description
Free-Running Timer
These bits indicate the current value of the
free-running timer (FRT).
FRT
FRT
R/W
R/W
SI3
23
23
R
R
0
7
0
0
7
0
ICE2
R/W
R/W
SI2
22
22
R
R
0
0
0
0
6
6
ICE1
R/W
R/W
SI1
21
21
0
0
0
R
0
R
5
5
ICE0
R/W
R/W
SI0
20
20
R
R
0
0
0
4
0
4
IEE3
OP3
R/W
R/W
19
19
0
0
R
R
0
3
0
3
IEE2
OP2
R/W
R/W
18
18
0
0
R
R
0
2
0
2
IEE1
R/W
R/W
OP1
17
17
0
0
R
R
0
1
0
1
IEE0
R/W
R/W
OP0
16
16
R
R
0
0
0
0
0
0

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