HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1101

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
27.6.3
Figure 27.8 shows the timing chart for continuous data transfer to the MFRAM via the MFI. As
shown in this timing chart, setting the starting address and the data to be written first will enable
continuous data transfer subsequently. It provides effective data transfer to this LSI using DMA
transfer and others.
27.6.4
Figure 27.9 shows the timing chart for continuous reading from the MFRAM via the MFI. As
shown in this timing chart, setting the start address will enable continuous data reading
subsequently. It provides effective data transfer from this LSI using DMA transfer and others.
MFI-CS
MFI-RS
MFI-E/WR
MFI-RW/RD
MFI-D7-MFI-D0
MFI-CS
MFI-RS
MFI-E/WR
MFI-RW/RD
MFI-D7-MFI-D0
Continuous Data Writing to MFRAM via MFI
Continuous Reading from MFRAM via MFI
MFIADR setting
Bits 15-8 = AH
Bits 7-0 = AL
Figure 27.9 Continuous Data Reading from MFRAM
MFIADR setting
Bits 15-8 = AH
Bits 7-0 = AL
16 AH 17 AL 0B 84 18
Figure 27.8 Continuous Data Writing to MFRAM
16 AH 17 AL 18 D1 19 D2 1A D3 1B D4 0B A0 18
(8-Bit Bus Width, MFISCR.SCRMD2 = 0)
(8-Bit Bus Width, MFISCR.SCRMD2 = 0)
MFIMCR set to
continuous write
and auto increment
Data for first write
operation
set in MFIDATA
D
D
MFIDATA
selection
D
MFIMCR set to
continuous write
and auto increment
D
D
D
Rev. 2.00 Feb. 12, 2010 Page 1017 of 1330
D
D
MFIDATA
selection
Continuous data read
D
D
D
D
D
Continuous data write
D
D
D
D
D
D
D
D
REJ09B0554-0200
D
D
D
D
D
D
D

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