HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1089

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Note:
Bit
5
4
3, 2
1
0
* The external device can write to this bit via the MFI. The on-chip CPU cannot write to
Bit Name
⎯
SCRMD0
⎯
EDN
BO
Byte
Word
Longword
this bit.
31
Relation between lower two bits of address and access size used when accessing MFRAM
Initial
Value
0
0
All 0
0
0
00
00
Figure 27.2 Differences in EDN Bit Settings
When EDN = 0
01
MFRAM
R/W
R
R
R
R/W
R/W
00
10
10
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
MFI mode 0
The MFI-MD pin value is sampled at a power-on reset by
the RESET pin.
Indicates whether the MFI is the 68- or the 80-series
interface. Indicates the value of the MFI-MD signal.
0: 80-series interface
1: 68-series interface
Reserved
These bits are always read as 0. The write value should
always be 0.
Endian setting (for MFRAM access)
Specifies the byte order when accessing the MFRAM
from the on-chip CPU. See figure 27.2. (Can be set
independently from the MD5 pin setting of this LSI.)
0: Big endian
1: Little endian
Byte order
Specifies the byte order of MFIDATA corresponding to
MFIADR.
0: Big endian
1: Little endian
11
0
Byte
Word
Longword
Rev. 2.00 Feb. 12, 2010 Page 1005 of 1330
31
11
10
When EDN = 1
10
MFRAM
00
01
00
REJ09B0554-0200
00
0