HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 639

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Bit
27
26
25
24
23
22
21
20
19
18
17
16
15, 14
13, 12
Bit Name
IOE3
IOE2
IOE1
IOE0
ICE3
ICE2
ICE1
ICE0
IEE3
IEE2
IEE1
IEE0
CC3
CC2
Initial Value
0
0
0
0
0
0
0
0
0
0
0
0
All 0
All 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Channel 3 to 0 Interrupt Overflow Enable
These bits enable an interrupt to be generated
when the relevant IOn bit is set in the IRQ status
register.
0: Interrupt generation disabled
1: Interrupt generation enabled
Channel 3 to 0 Interrupt Compare Enable
These bits enable an interrupt to be generated
when the relevant ICn bit is set in the IRQ status
register.
0: Interrupt generation disabled
1: Interrupt generation enabled
Channel 3 to 0 Interrupt Edge Enable
These bits enable an interrupt to be generated
when the relevant IEn bit is set in the IRQ status
register.
0: Interrupt generation disabled
1: Interrupt generation enabled
When a channel is in outup compare mode, the
corresponding IEEn has to be set to 0.
Timer Clock Control Channel 3
These bits specify the clock input for the 16-bit
timer/counter in channel 3.*
00: Clock for timer 3 is 1/32 of source clock
01: Clock for timer 3 is 1/128 of source clock
10: Clock for timer 3 is 1/512 of source clock
11: Clock for timer 3 is 1/1024 of source clock
Set the same value as the CC0 bit when using 16-
bit input capture mode.
Timer Clock Control Channel 2
These bits specify the clock input for the 16-bit
timer/counter in channel 2.*
00: Clock for timer 2 is 1/32 of source clock
01: Clock for timer 2 is 1/128 of source clock
10: Clock for timer 2 is 1/512 of source clock
11: Clock for timer 2 is 1/1024 of source clock
Set the same value as the CC0 bit when using 16-
bit input capture mode.
Rev. 2.00 Feb. 12, 2010 Page 555 of 1330
REJ09B0554-0200