HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 337

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
Area
7*
Table 10.2 Off-chip Memory Space Map
0
1
2
3
4
5
6
Notes: 1. The memory bus width in area 0 is specified by off-chip pins.
5
Off-chip
Addresses
H'0000 0000
to
H'03FF FFFF
H'0400 0000
to
H'07FF FFFF
H'0800 0000
to
H'0BFF FFFF
H'0C00 0000 to
H'0FFF FFFF
H'1000 0000
to
H'13FF FFFF
H'1400 0000
to
H'17FF FFFF
H'1800 0000
to
H'1BFF FFFF
H'1C00 0000 to
H'1FFF FFFF
2. The memory bus width in areas other than area 0 is specified by the register.
3. With synchronous DRAM interface, the bus width is 32 bits only.
4. With PCMCIA interface, the bus width is 8 or 16 bits only.
5. Do not access a reserved area, as operation cannot be guaranteed in this case.
6. A 64-bit access size applies only to transfer by the DMAC (CHCRn.TS = 000).
In the case of access to off-chip memory by means of FMOV (FPSCR.SZ = 1), two
32-bit access size transfers are performed.
Size
64 Mbytes —
64 Mbytes SRAM
64 Mbytes SRAM
64 Mbytes SRAM
64 Mbytes SRAM
64 Mbytes SRAM
64 Mbytes SRAM
64 Mbytes SRAM
Connectable
Memory
Burst ROM
MPX
MPX
Byte control SRAM
Synchronous DRAM
MPX
Synchronous DRAM
MPX
MPX
Byte control RAM
MPX
Burst ROM
PCMCIA
MPX
Burst ROM
PCMCIA
Specifiable
Bus Width*
8, 16, 32
8, 16, 32
32
8, 16, 32
32
16, 32
8, 16, 32
32*
32
8, 16, 32
32*
32
8, 16, 32
32
16, 32
8, 16, 32
32
8, 16, 32
8, 16*
8, 16, 32
32
8, 16, 32
8, 16*
Rev. 2.00 Feb. 12, 2010 Page 253 of 1330
3
3
4
4
1
*
2
Access Size
8, 16, 32, 64*
32 bytes
8, 16, 32, 64*
32 bytes
8, 16, 32, 64*
32 bytes
8, 16, 32, 64*
32 bytes
8, 16, 32, 64*
32 bytes
8, 16, 32, 64*
32 bytes
8, 16, 32, 64*
32 bytes
REJ09B0554-0200
6
6
6
6
6
6
6
bits,
bits,
bits,
bits,
bits,
bits,
bits,

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