HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1081

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

This LSI incorporates a multifunctional interface (MFI) for use in high-speed transfer of data to
external devices which cannot share an external bus. The MFI is a parallel interface with
selectable 8-bit/16-bit bus width, and can be directly connected to 68/80-series system interfaces.
The MFI allows external devices to read from and write to 2-Kbyte on-chip RAM exclusively for
MFI use (MFRAM), in 32-bit units. Access to this MFRAM is available via the MFI and the CPU
of this LSI. The MFI supports interrupts issued to this LSI by an external device, and those sent
from this LSI to the external device. Using the MFRAM and these interrupt functions enables
software-based data transfer between external devices and the on-chip CPU and connection to
external devices not having bus privileges.
27.1
• Provides reading from/writing to the 2-Kbyte on-chip MFRAM in 32-bit units via MFI pins,
• Supports a high-speed asynchronous interface with selectable 8-bit/16-bit bus width; allows
• Automatic address increments and endian settings are configurable.
• Writing to specific bits of MFI on-chip registers from an external device will issue interrupts to
• Provides 7 interrupt source bits each for internal interrupts and for external interrupts. It allows
and in 8-, 16-, or 32-bit units from the on-chip CPU.
selection of 68- or 80-series during reset period.
this LSI. Conversely, this LSI is able to send interrupts from the on-chip CPU to the external
device.
software-based control of 128 different interrupts with high-speed data transfer using
interrupts.
Features
Section 27 Multifunctional Interface (MFI)
Rev. 2.00 Feb. 12, 2010 Page 997 of 1330
REJ09B0554-0200