HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 336

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

With this LSI, various types of memory or PC cards can be connected to each of the seven areas of
off-chip address space as shown in table 10.2, and chip select signals (CS0 to CS6, CE2A, CE2B)
are output for each of these areas. CS0 is asserted when accessing area 0, and CS6 when accessing
area 6. When synchronous DRAM is connected to area 2 or 3, signals such as RAS, CASS,
RD/WR, and DQM are also asserted. When the PCMCIA interface is selected for area 5 or 6,
CE2A or CE2B is asserted in addition to CS5 or CS6 for the byte to be accessed.
Rev. 2.00 Feb. 12, 2010 Page 252 of 1330
REJ09B0554-0200
Figure 10.2 Correspondence between Virtual Address Space and Off-chip Memory Space
H'0000 0000
H'8000 0000
H'A000 0000
H'C000 0000
H'E000 0000
H'E400 0000
H'FFFF FFFF
Notes: 1. When the MMU is off (MMUCR.AT = 0), the top 3 bits of the 32-bit address are ignored, and
2. When the MMU is on (MMUCR.AT = 1), the P0, U0, P3, and store queue areas can be
memory is mapped onto a fixed 29-bit external address.
mapped onto any external address using the TLB.
Physical address
Store queue area
(MMU off)
U0 areas
P1 area
P2 area
P3 area
P4 area
P0 and
space
256
Virtual address
Store queue area
(MMU on)
U0 areas
P1 area
P2 area
P3 area
P4 area
P0 and
space
Area 7 (reserved area)
External memory
Area 0 (CS0)
Area 1 (CS1)
Area 2 (CS2)
Area 3 (CS3)
Area 4 (CS4)
Area 5 (CS5)
Area 6 (CS6)
space
H'0000 0000
H'0400 0000
H'0800 0000
H'0C00 0000
H'1000 0000
H'1400 0000
H'1800 0000
H'1C00 0000
H'1FFF FFFF