HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 643

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Note: n = 3 to 0
16.4
The timer consists of two sections of which the first is a 32-bit free-running timer for which the
clock can be set to operate between approximately 1 MHz and 30 kHz. The second section
consists of four 16-bit counters with the ability to count up and the ability to count down. This
counting is controlled through edge detection on the input pins. The timer and counters can be
used as counters which count based on inputs or can operate as timers with input capture/output
compare. They differ from the 32-bit timer of the FRT in that they are reset to H'0000 when a
capture or compare occurs on that channel.
The timer/counter consists of four channels, each of which can be configured as a timer or a
counter. In timer mode, each of the four channels has two operating modes: input capture mode
and output compare mode.
16.4.1
The timers and counters are based on edge detection on the input pins. An active edge can be
programmed to be a rising edge, falling edge, or both edges. In addition, the edge detection logic
can operate in rotary switch mode where the combination of two inputs indicates whether the
switch has been turned right or left. This switch indicates increment or decrement of the updown-
counter. Edge detection operating on two inputs functions as a pair. The outputs can either work
independently for the timers or the up-counters or can work as pairs to indicate up and down to the
updown-counters.
In order for an edge to be detected, the pulse must last for at least two cycles of the clock divided
from the source clock for that channel, as shown in figure 16.2.
Bit
31 to 16 —
15 to 0
Bit Name
Channel n
counter
Operation
Edge Detection
Initial Value
—
All 0
R/W
R
R/W
Description
Reserved
These bits can only be read from. The write
value should always be 0.
Channel n Counter
A register for each channel indicates the
current value of the counters. This register
can be written to for setting the counter
values. Reading from these registers does not
affect the count value.
Rev. 2.00 Feb. 12, 2010 Page 559 of 1330
REJ09B0554-0200