HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 208

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

6.2.3
PTEA can be accessed in longwords from H'FF00 0034 in the P4 area and from H'1F00 0034 in
area 7. PTEA is used to store assistance bits for PCMCIA access to the UTLB by means of the
LDTLB instruction. When performing access from the CPU in SH7760 to the PCMCIA interface
area with the AT bit in MMUCR cleared to 0, access is always performed using the values of the
SA and TC bits in this register. The access to a PCMCIA interface area by the DMAC is always
performed using the SSAn, DSAn, STC, and DTC values in CHCRn of the DMAC. The contents
of this register are not changed unless a software directive is issued.
Initial value:
Initial value:
6.2.4
TTB can be accessed in longwords from H'FF00 0008 in the P4 area and from H'1F00 0008 in
area 7. TTB is used, for example, to hold the base address of the currently used page table. The
contents of TTB are not changed unless a software directive is issued. This register can be used
freely by software.
Initial value:
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 124 of 1330
REJ09B0554-0200
Bit
31 to 4
3
2
1
0
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
Page Table Entry Assistance Register (PTEA)
Translation Table Base Register (TTB)
Bit Name
⎯
TC
SA2
SA1
SA0
R/W
R/W
31
15
31
15
R
R
0
0
-
-
-
-
R/W
R/W
30
14
30
14
-
R
-
R
-
0
0
-
R/W
R/W
29
13
29
13
R
R
0
0
-
-
-
-
Initial Value
All 0
⎯
⎯
⎯
⎯
R/W
R/W
28
12
28
12
R
R
0
-
0
-
-
-
R/W
R/W
27
11
27
11
R
0
R
0
-
-
-
-
R/W
R/W
26
10
26
10
R
R
0
-
0
-
-
-
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
25
25
R
-
0
R
-
0
9
-
9
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
PCMCIA Access Assistance Bits
For details, see section 6.3, TLB Functions.
R/W
R/W
24
24
R
R
0
0
8
8
-
-
-
-
TTB
TTB
R/W
R/W
23
23
R
0
R
0
7
7
-
-
-
-
R/W
R/W
22
22
R
0
R
0
6
6
-
-
-
-
R/W
R/W
21
21
0
R
R
0
5
5
-
-
-
-
R/W
R/W
20
20
R
0
R
0
4
4
-
-
-
-
R/W
R/W
R/W
TC
19
19
R
0
3
3
-
-
-
-
SA2
R/W
R/W
R/W
18
18
R
0
2
2
-
-
-
-
SA1
R/W
R/W
R/W
17
17
R
0
1
1
-
-
-
-
SA0
R/W
R/W
R/W
16
16
R
0
0
0
-
-
-
-