HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1150

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Register Name
LCDC power supply sequence
period register
LCDC control register
Notes: 1. There are 256 registers: LDPR00, LDPR01, ……, LDPRFF. These registers are
Table 30.2 Register Configuration (2)
LCDC input clock register
LCDC module type register
LCDC data format register
LCDC scan mode register
LCDC display start address register -
upper
LCDC display start address register -
lower
LCDC display line address offset
register
LCDC palette control register
Palette data registers 00 to FF
LCDC horizontal character number
register
LCDC horizontal synchronization signal
register
LCDC vertical display line number
register
LCDC vertical total line number registerLDVTLNR H'01DF
LCDC vertical synchronization signal
register
Rev. 2.00 Feb. 12, 2010 Page 1066 of 1330
REJ09B0554-0200
Register Name
2. Modification During Display - Yes: Modification during display on the LCD allowed,
allocated to H'FE30 0800, H'FE30 0804, ……, H'FE30 0BFC.
No: Modification during display on the LCD not allowed.
Abbrev.
LDPSPR
LDCNTR
LDICKR
LDMTR
LDDFR
LDSMR
LDSARU
LDSARL
LDLAOR
LDPALCR H'0000
LDPR00 to
FF*
LDHCNR
LDHSYNR H'0050
LDVDLNR H'01DF
LDVSYNR H'01DF
Abbrev.
1
R/W P4 Address
R/W H'FE30 0C26 H'1E30 0C26 16
R/W H'FE30 0C28 H'1E30 0C28 16
H'0101
H'0109
H'000C
H'0000
H'0C00
0000
H'0C00
0000
H'0280
Undefined Undefined
H'4F52
Power-on
Reset by
RESET
Pin/WDT/
H-UDI
H'0101
H'0109
H'000C
H'0000
H'0C00
0000
H'0C00
0000
H'0280
H'0000
H'4F52
H'0050
H'01DF
H'01DF
H'01DF
Manual Reset
by RESET
Pin/WDT/
Multiple
Exception
Area 7
Address
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Sleep
by Sleep
Instruction/
Deep Sleep
Size
Sync
Clock
Pck
Pck
by
Hardware
*
Standby
Modification
During
Display*
No
No
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
by
Software/
Each
Module
2