HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 991

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

24.2.37 Mode Select Register (MODSELR)
MODESELR is an 8-bit readable/writable register that individually sets the mode of pins MFI-D2
to MFI-D7 and SSI0_SCK. When MFI mode/LCD mode is used, modules should be selected in
IPSELR. However, when these pins are used as GPIOs, the settings in this register will be invalid.
Bit
3
2 to 0
Bit
7
6
5
4
3
Bit Name
SCITXD2
—
Bit Name
MODSELR7
MODSELR6
MODSELR5
MODSELR4
MODSELR3
Initial value:
Initial Value
0
All 0
Initial Value
0
0
0
0
0
R/W:
Bit:
SELR7
MOD
R/W
7
0
SELR6
MOD
R/W
6
0
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
SELR5
MOD
R/W
5
0
Description
0: Sets SCIF2_TXD Hi-Z state to off
1: Sets SCIF2_TXD Hi-Z state to on
Reserved
These bits are always read as 0, and the write
value should always be 0.
Description
Selects the mode of pin
MFI-D2/LCD_DATA2/IRQ6
0: MFI mode/LCD mode (MFI/LCDC)
1: IRQ6
Selects the mode of pin
MFI-D3/LCD_DATA3/IRQ7
0: MFI mode/LCD mode (MFI/LCDC)
1: IRQ7
Selects the mode of pin
MFI-D4/LCD_DATA4/DREQ2
0: MFI mode/LCD mode (MFI/LCDC)
1: DREQ2
Selects the mode of pin
MFI-D5/LCD_DATA5/DRAK2/DACK2
0: MFI mode/LCD mode (MFI/LCDC)
1: DRAK2/DACK2
Selects the mode of pin
MFI-D6/LCD_DATA6/DREQ3
0: MFI mode/LCD mode (MFI/LCDC)
1: DREQ3
SELR4
MOD
R/W
4
0
SELR3
MOD
R/W
3
0
Rev. 2.00 Feb. 12, 2010 Page 907 of 1330
SELR2
MOD
R/W
2
0
SELR1
MOD
R/W
1
0
R
0
0
-
REJ09B0554-0200