HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 276

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

8.4
There are three registers related to exception handling. These are allocated to memory, and can be
accessed by specifying the P4 address or area 7 address. For details on the addresses of these
registers and the state of registers in each operating mode, see section 32, List of Registers.
Table 8.2
Register Name
TRAPA exception register
Exception event register
Interrupt event register
Table 8.2
TRAPA exception register
Exception event register
Interrupt event register
Note: * After exiting hardware standby mode, this LSI enters the power-on reset state caused by
Rev. 2.00 Feb. 12, 2010 Page 192 of 1330
REJ09B0554-0200
Register Name
Register Descriptions
the RESET pin.
Register Configuration (1)
Register Configuration (2)
Abbrev.
TRA
EXPEVT
INTEVT
TRA
EXPEVT
INTEVT
Abbrev.
R/W
R/W
R/W
R/W
Undefined
H'0000 0000 H'0000 0020 Retained
Undefined
Power-on
Reset by
RESET
Pin/WDT/
H-UDI
P4 Address
H'FF00 0020
H'FF00 0024
H'FF00 0028
Undefined
Undefined
Manual Reset
by RESET
Pin/WDT/
Multiple
Exception
Area 7 Address Size
H'1F00 0020
H'1F00 0024
H'1F00 0028
Retained
Retained
Sleep
by Sleep
Instruction/
Deep Sleep
by
Hardware
*
32
32
32
Standby
by
Software/
Each
Module
Retained
Retained
Retained
Sync
Clock
Ick
Ick
Ick