HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1213

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
31.2.7
BDRB is a 32-bit readable/writable register that specifies the data (bits 31 to 0) to be used in the
channel B break conditions.
Initial value:
Initial value:
31.2.8
BDMRB is a 32-bit readable/writable register that specifies which bits of the break data set in
BDRB are to be masked. When the value of the data bus is included in the break conditions, its
operand size should be specified. When the byte size is specified as an operand size, the same data
should be specified to bits 15 to 8 and bits 7 to 0 in both BDRB and BDMRB.
Initial value:
Initial value:
Bit
31 to 0
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
BDB31
BDB15
Break Data Register B (BDRB)
Break Data Mask Register B (BDMRB)
BDMB31
BDMB15
Bit Name
BDB31 to
BDB0
R/W
R/W
R/W
R/W
31
15
31
15
-
-
-
-
BDB30
BDB14
BDMB30
BDMB14
R/W
R/W
R/W
R/W
30
14
30
14
-
-
-
-
BDB29
BDB13
BDMB29
BDMB13
R/W
R/W
R/W
R/W
29
13
29
13
-
-
-
-
Initial Value
BDB28 BDB27
BDB12 BDB11
BDMB28 BDMB27
BDMB12 BDMB11
R/W
R/W
R/W
R/W
28
12
28
12
-
-
-
-
R/W
R/W
R/W
R/W
27
11
27
11
-
-
-
-
BDB26
BDB10
BDMB26
BDMB10
R/W
R/W
R/W
R/W
26
10
26
10
-
-
-
-
R/W
R/W
BDB25
BDMB25
BDB9
BDMB9
R/W
R/W
R/W
R/W
25
25
-
-
-
-
9
9
Description
Break Data B
These bits store the data (bits 31 to 0) to be used
in the channel B break conditions.
BDB24
BDMB24
BDB8
BDMB8
R/W
R/W
R/W
R/W
24
24
8
8
-
-
-
-
BDB23 BDB22 BDB21
BDMB23 BDMB22 BDMB21
BDB7 BDB6 BDB5
BDMB7
R/W
R/W
R/W
R/W
23
23
7
7
-
-
-
-
Rev. 2.00 Feb. 12, 2010 Page 1129 of 1330
BDMB6
R/W
R/W
R/W
R/W
22
22
6
6
-
-
-
-
BDMB5
R/W
R/W
R/W
R/W
21
21
5
5
-
-
-
-
BDB20 BDB19 BDB18 BDB17 BDB16
BDMB20 BDMB19 BDMB18 BDMB17 BDMB16
BDB4 BDB3 BDB2 BDB1 BDB0
BDMB4
R/W
R/W
R/W
R/W
20
20
4
4
-
-
-
-
BDMB3
R/W
R/W
R/W
R/W
19
19
3
3
-
-
-
-
REJ09B0554-0200
BDMB2
R/W
R/W
R/W
R/W
18
18
2
2
-
-
-
-
BDMB1
R/W
R/W
R/W
R/W
17
17
1
1
-
-
-
-
BDMB0
R/W
R/W
R/W
R/W
16
16
0
0
-
-
-
-

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