HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 16

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Item
15.3 Register
Descriptions
Table 15.2 Register
Configuration (2)
15.6.3 External Clock
Frequency
16.3.4 IRQ Status
Register (CMTIRQS)
16.4.4 16-Bit Timer:
Input Capture
16.4.5 16-Bit Timer:
Output Compare
16.4.7 Counter: Up-
Counter with Capture
Rev. 2.00 Feb. 12, 2010 Page xiv of lxxxii
REJ09B0554-0200
Page
536
545
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Revision (See Manual for Details)
Table amended
Common
Description amended
Ensure that the external clock (TCLK) frequency for each
channel does not exceed Pck/8.
Table amended
Note added
Note: * Writing 0 to clear the bit to 0 is allowed.
Description amended
The counters will
enable bits.
Description amended
The counters will
enable bits.
Description amended
The counter will
enable bit.
Ch.
Bit
11
10
9
8
7
6
5
4
3
2
1
0
Register Name
Timer start register
Bit Name
IO3
IO2
IO1
IO0
IC3
IC2
IC1
IC0
IE3
IE2
IE1
IE0
Initial Value
0
0
0
0
0
0
0
0
0
0
0
0
be cleared to H'0000 by disabling the timer
be cleared to H'0000 by disabling the timer
be cleared to H'0000 by disabling the timer
Abbrev.
TSTR
R/W
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
R/WC0*
Power-on
Reset by
R R ESET Pin/
WDT/H-UDI
H'00
Description
Channel 3 to 0 Interrupt Overflow
A bit for each channel indicates if the up-counters
or updown-counters have wrapped i.e. overflowed
from H'FFFF to H'0000 or underflowed from
H'0000 to H'FFFF.
0: The count has not overflowed or underflowed
1: The count has overflowed or underflowed
Channel 3 to 0 Interrupt Compare
A bit for each channel indicates whether in timer
mode, the free-running timer has become equal to
the channel times.
0: Timer has not become equal to the channel
1: Timer has become equal to the channel time
Channel 3 to 0 Interrupt Edge
A bit for each channel indicates whether an edge
that wil cause an action (active edge) has been
defected.
0: Channel 3 to 0 has not received an active edge
1: Channel 3 to 0 has received an active edge
time value
value
H'00
Manual Reset
by RESET
Pin/WDT/
Multiple
Exception
Retained
Sleep
by Sleep
Instruction/
Deep Sleep
by
Hardware
*
Standby
H'00
by
Software/
Each
Module