HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 927

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

The HCAN2 Scheduler, which runs internal arbitration, has two states, Tx Arbitration State and
Rx Matching State. HCAN2 Scheduler is in the Rx Matching State if the CAN bus is in the EOF
or Intermission cycle, or otherwise is in the Tx Arbitration State. When a transmission (or
transmission abortion) request is made in the Tx Arbitration State, the internal arbitration starts
immediately. When a transmission (or transmission abortion) request is made in the Rx Matching
State, the internal arbitration waits until the Rx Matching State (i.e. Intermission field) is finished,
and then starts running as soon as the HCAN2 scheduler state becomes the ‘Tx arbitration state'.
There are 5 factors that can run internal arbitration, which are:
• CANTXPR is set.
• CANTXCR is set (not that, if CANTXCR is set for the message currently under transmission,
• Error occurs on the CAN bus.
HCAN2 does not stop the transmission but completes. If the message loses the bus arbitration
or causes an error on the bus, the HCAN2 will cancel the transmission request.)
CAN bus
HCAN2
scheduler
Scheduler
start point
TXPR/TXCR/
Error/arbitration
-lost set point
1-1
2-1 , 2-2
3-1 , 3-2
3-3 , 3-4
Interm
SOF
EOF
Message
: Intermission field
: Start of frame
: End of frame
: Arbitration + Control + Data + CRC + ACK
:If CANTXPR bit is set during the CAN bus idle state, the internal arbitration starts operation
:If one of the five factors described above is generated in this period (during frame 2 Tx arbitration),
:The internal arbitration is disabled in this period (during Rx matching). It is scheduled
:Same as 2-1 , 2-2 .
and transmission is started.
the internal arbitration is started and the next transmitted frame (frame 2) is scheduled.
at the SOF of the next frame (frame 2). If the message requested to be transmitted is in the
highest priority, transmission is provided in frame 3.
Tx arbitration
for Frame 1
Bus idle
1-1
Figure 22.7 Internal Arbitration for Transmission
SOF
Tx arbitration
for Frame 2
2-1
Frame 1
Message
2-2
Rx matching
EOF Interm
3-1
3-2
SOF
Tx arbitration
for Frame 3
Rev. 2.00 Feb. 12, 2010 Page 843 of 1330
3-4
Frame 2
Message
3-3
Rx matching
EOF Interm
REJ09B0554-0200
SOF
Tx arbitration
Frame 3
for Frame 4