HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 994

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Figure 25.1 shows a block diagram of the HAC.
25.2
Table 25.1 describes the HAC pin configuration.
Table 25.1 Pin Configuration
Rev. 2.00 Feb. 12, 2010 Page 910 of 1330
REJ09B0554-0200
Name
HAC_BIT_CLK (0/1)
HAC_SD_IN (0/1)
HAC_SD_OUT (0/1)
HAC_SYNC (0/1)
HAC_RES
HAC_SYNC(0/1)
HAC_
BIT_CLK(0/1)
HAC_
SD_OUT(0/1)
HAC_
SD_IN (0/1)
HAC_RES
Input/Output Pins
Request signal
for slots 3 & 4
Shift register for slot 1
Shift register for slot 2
Shift register for slot 3
Shift register for slot 4
Shift register for slot 1
Shift register for slot 2
Shift register for slot 3
Shift register for slot 4
1
#
1
1
1
1
of Pins
HAC transmitter
HAC receiver
Figure 25.1 Block Diagram
Bit control signal
I/O
Input
Output
Output
Output
Input
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Control
Control
signal
signal
Function
HAC serial data clock
HAC serial data incoming to Rx frame
HAC serial data outgoing from Tx frame
HAC frame sync
HAC reset (negative logic signal) (common to
channels 0 and 1)
Internal bus interface
Internal bus interface
CSAR RX buffer
CSDR RX buffer
PCML RX buffer
PCMR RX buffer
CSAR TX buffer
CSDR TX buffer
PCML TX buffer
PCMR TX buffer
(Transmission)
(Reception)
DMA control
DMA control
Interrupt request
Interrupt request
DMA request
DMA request
Data[31:0]
Data[31:0]