HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1165

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

30.3.11 LCDC Horizontal Sync Signal Register (LDHSYNR)
LDHSYNR specifies the timing of the generation of the horizontal (scan direction) sync signals
for the LCD module.
Initial value:
Note: The following conditions must be satisfied:
Bit
15
14
13
12
11 to 8 ⎯
7
6
5
4
3
2
1
0
R/W:
Bit:
HTCN ≥ HSYNP+HSYNW+1
HSYNP ≥ HDCN+1
Bit Name
HSYNW3
HSYNW2
HSYNW1
HSYNW0
HSYNP7
HSYNP6
HSYNP5
HSYNP4
HSYNP3
HSYNP2
HSYNP1
HSYNP0
NW3
VSY
R/W
15
0
NW2
VSY
R/W
14
0
Initial Value R/W
0
0
0
0
All 0
0
1
0
1
0
0
0
0
NW1
VSY
R/W
13
0
NW0
VSY
R/W
12
0
11
R
0
-
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
NP10
R/W
VSY
10
0
Description
Horizontal Sync Signal Width
Sets the width of the horizontal sync signals (CL1 and
Hsync) (unit: character = 8 dots).
Specify a value of (width of horizontal sync signal) −1.
Example: For a horizontal sync signal width of 8 dots.
Reserved
These bits are always read as 0. The write value should
always be 0.
Horizontal Sync Signal Output Position
Sets the output position of the horizontal sync signals
(unit: character = 8 dots).
Specify a value of (position of horizontal sync signal
output) −1.
Example: For a LCD module with a width of 640 pixels.
R/W
VSY
NP9
9
0
R/W
VSY
NP8
8
1
HSYNW = (8 dots/8 dots/character) −1 = 0 =
H'0
HSYNP = [(640/8)+1] −1 = 80 = H'50
In this case, the horizontal sync signal is
active from the 648th through the 655th dot.
R/W
VSY
NP7
1
7
Rev. 2.00 Feb. 12, 2010 Page 1081 of 1330
R/W
VSY
NP6
6
1
VSY
R/W
NP5
5
0
VSY
R/W
NP4
4
1
VSY
NP3
R/W
3
1
REJ09B0554-0200
VSY
NP2
R/W
2
1
VSY
NP1
R/W
1
1
R/W
VSY
NP0
0
1