HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1085

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Table 27.2 Register Configuration (2)
Register Name
MFI index register
MFI general status register
MFI status/control register
MFI memory control register
MFI on-chip interrupt control register MFIIICR H'0000
MFI external interrupt control register MFIEICR H'0000
MFI address register
MFI data register
Notes: 1. The external device can write to this register only when the MFI-RS pin is driven high.
2. The external device can write to bit 6 only via the MFI. The on-chip CPU cannot write to
3. 80-series interface: 0040; 68-series interface: 0050
4. The external device can write to bits 7, 5, 3, and 0 only via the MFI. The on-chip CPU
5. The external device can write to bits 10 to 2 only via the MFI. The on-chip CPU cannot
6. After exiting hardware standby mode, this LSI enters the power-on reset state by the
The on-chip CPU cannot write to this register.
this bit. Perform a reading of MFISCR after changing this bit to check for malfunctions.
cannot write to these bits.
write to these bits.
RESET pin.
MFIIDX
MFIGSR H'0000
MFISCR
MFIMCR H'0000
MFIADR H'0000
MFIDATA H'0000
MFRAM
Start
MFRAM
End
Abbrev.
Power-on
Reset by
RESET
Pin/WDT/
H-UDI
H'0000
H'0040/H'0050
Undefined
Undefined
*
3
H'0000
H'0000
H'0040/H'0050
H'0000
H'0000
H'0000
H'0000
H'0000
Undefined
Undefined
Manual Reset
by RESET
Pin/WDT/
Multiple
Exception
Rev. 2.00 Feb. 12, 2010 Page 1001 of 1330
*
3
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Sleep
by Sleep
Instruction
/Deep
Sleep
by
Hardware
REJ09B0554-0200
*
6
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
by
Software
/Each
Module