HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 917

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
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Note: * Only a write of 1 is allowed to clear the bit.
22.5.12 Remote Frame Request Pending Registers 1 and 0 (CANRFPR1, CANRFPR0)
The CANRFPR are two 16-bit read/conditionally-write registers that contains the received Remote
Frame pending flags associated with the configured Receive Mailboxes. When a CAN Remote
Frame is successfully stored in a receive Mailbox, the corresponding bit is set in CANRFPR. The
bit may be cleared by writing a 1 to the corresponding bit position. Writing a 0 has no effect.
There is a bit position for all mailboxes. However, the bit may only be set if the Mailbox is
configured by its MBC (Mailbox Configuration) to receive Remote Frames. When a CANRFPR
bit is set, IRR2 (Remote Frame Request Interrupt Flag) is also set CANMBIMR (Mailbox
Interrupt Mask Register) is not set, and the interrupt signal is generated if IMR2 is not set. Note
that these bits are only set by receiving Remote Frames and not by receiving Data Frames.
• CANRFPR1
Initial value:
Note: * Only a write of 1 is allowed to clear the bit.
15 to 0
15 to 0
Bit
Bit
R/W:
Bit:
RXPR0[15:0]
RFPR1
RFPR1[15:0]
R/W*
_15
15
0
Bit Name
Bit Name
RFPR1
R/W*
_14
14
0
RFPR1
R/W*
_13
13
0
RFPR1
R/W*
All 0
All 0
_12
Initial Value
12
Initial Value
0
RFPR1
R/W*
_11
11
0
RFPR1
R/W*
_10
10
0
R/W*
R/W*
RFPR1
R/W*
R/W
R/W
_9
9
0
RFPR1
R/W*
_8
8
0
Configurable receive Mailbox locations
corresponding to Mailbox position from 15 to 0
respectively.
0: Clearing condition: Write a 1 to this bit.
1: Corresponding Mailbox received a CAN
Remote request pending flags for Mailboxes
31 to 16 respectively.
0: Clearing condition: Write a 1 to this bit.
1: Corresponding Mailbox received Remote
RFPR1
Data Frame.
Setting condition: Completion of Data
Frame receive on corresponding Mailbox
R/W*
Frame.
Setting condition: Completion of remote
frame reception in the corresponding
Mailbox
_7
0
7
RFPR1
Rev. 2.00 Feb. 12, 2010 Page 833 of 1330
R/W*
_6
6
0
RFPR1
R/W*
_5
5
0
Description
Description
RFPR1
R/W*
_4
4
0
RFPR1
R/W*
_3
3
0
REJ09B0554-0200
RFPR1
R/W*
_2
2
0
RFPR1
R/W*
_1
1
0
RFPR1
R/W*
_0
0
0

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