HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 768

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
Section 19 I
19.3.12 FIFO Status Register (ICFSR)
ICFSR is a 32-bit register that indicates the operation state of the I
written to and read from the CPU. However, writing 1 to the TEND, RDF and TDFE flags is not
allowed. It is possible to write 0 to clear the flags.
Initial value:
Initial value:
Rev. 2.00 Feb. 12, 2010 Page 684 of 1330
REJ09B0554-0200
Bit
31 to 3
2
R/W:
R/W:
Bit:
Bit:
Bit Name
TEND
31
15
2
R
R
0
0
-
-
C Bus Interface
30
14
-
R
-
R
0
0
29
13
R
R
0
0
-
-
Initial Value
All 0
0
28
12
R
R
0
0
-
-
27
11
R
R
0
0
-
-
R/W
R
R/W
26
10
R
R
0
0
-
-
25
R
R
-
0
9
-
0
Description
Reserved.
These bits are always read as 0, and the write
value should always be 0.
Transmit End
Indicates the end of transmission with no valid
data in ICTXD when the last bit of the character is
transmitted.
0: Indicates transmission in progress
[Clear conditions]
1: Indicates transmission end
[Set condition]
24
R
R
0
8
0
-
-
Power-on reset, or manual reset
When transmit data is written to ICTXD and 0
to the TEND flag.
When there is no transmit data in ICTXD when
the last bit of the 1-byte character is
transmitted.
23
R
R
0
7
0
-
-
22
R
R
0
6
0
-
-
2
C. ICFSR can always be
21
R
R
0
5
0
-
-
20
R
R
0
4
0
-
-
19
R
R
0
3
0
-
-
TEND RDF TDFE
R/W
18
R
0
2
0
-
R/W
17
R
0
1
0
-
R/W
16
R
0
0
1
-

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