HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 707

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Table 17.7 SCIF Interrupt Sources
Note:
17.6
Note the following when using the SCIF.
(1) SCFTDR Writing and the TDFE Flag
The TDFE flag in SCFSR is set when the number of transmit data bytes written in SCFTDR has
fallen to or below the transmit trigger number set by bits TTRG1 and TTRG0 in SCFCR. After
TDFE is set, transmit data up to the number of empty bytes in SCFTDR can be written, allowing
efficient continuous transmission.
However, if the number of data bytes written in SCFTDR is equal to or less than the transmit
trigger number, the TDFE flag will be set to 1 again, even after being read as 1 and cleared to 0.
TDFE clearing should therefore be carried out when SCFTDR contains more than the transmit
trigger number of transmit data bytes.
The number of transmit data bytes in SCFTDR can be found from SCTFDR.
(2) SCFRDR Reading and the RDF Flag
The RDF flag in SCFSR is set when the number of receive data bytes in SCFRDR has become
equal to or greater than the receive trigger number set by bits RTRG1 and RTRG0 in SCFCR.
After RDF is set, receive data equivalent to the trigger number can be read from SCFRDR,
allowing efficient continuous reception.
However, if the number of data bytes read in SCFRDR is equal to or greater than the trigger
number, the RDF flag will be set to 1 again even if it is cleared to 0. After the receive data is
read, clear the RDF flag readout to 0 in order to reduce the number of data bytes in SCFRDR to
less than the trigger number.
Interrupt
Source
ERI
RXI
BRI
TXI
* An RXI interrupt by setting of the DR flag is available only in asynchronous mode.
Usage Notes
Description
(RDF) or receive data ready flag (DR)*
error flag (ORER)
flag (TDFE)
Interrupt initiated by receive error flag (ER)
Interrupt initiated by receive FIFO data full flag
Interrupt initiated by break flag (BRK) or overrun
Interrupt initiated by transmit FIFO data empty
Rev. 2.00 Feb. 12, 2010 Page 623 of 1330
DMAC
Activation
Not possible
Possible
Not possible
Possible
REJ09B0554-0200
Priority on
Reset Release
High
Low