HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 798

SH4 7760, 17 X17 256BGA, LCDC, U

HD6417760BL200AV

Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417760BL200AV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
Rev. 2.00 Feb. 12, 2010 Page 714 of 1330
REJ09B0554-0200
Bit
9
8
Bit Name
DEL
Initial Value
0
R/W
R/W
Description
Serial Data Delay
0: 1 clock cycle delay between SSI_WS and
1: No delay between SSI_WS and SSI_SDATA
SSI_SDATA
This bit must be set to 1 when CPEN = 1. A
one-clock cycle delay is not supported when
the SSI module is configured to be a slave
transmitter (SWSD = 0 and TRMD = 1). In this
situation, this bit should be set to 0.
DWL = 010, 011, 100, 101 (data word length:
18, 20, 22 and 24 bits), PDTA = 0 (left
aligned)
The data bits which are used in SSIRDR or
SSITDR are the following:
Bits 31 to (32 – number of bits having data
word length specified by DWL).
If DWL = 011 then data word length is 20 bits
and bits 31 to 12 are used of either SSIRDR
or SSITDR. All other bits are ignored or
reserved.
DWL = 010, 011, 100, 101 (data word length:
18, 20, 22 and 24 bits), PDTA = 1 (right
aligned)
The data bits which are used in SSIRDR or
SSITDR are the following:
Bits (number of bits having data word length
specified by DWL - 1) to 0.
If DWL = 011 then data word length is 20 bits
and bits 19 to 0 are used of either SSIRDR or
SSITDR. All other bits are ignored or
reserved.
DWL = 110 (data word length: 32 bits), PDTA
ignored
All data bits in SSIRDR or SSITDR are used
on the audio serial bus.

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