HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 975

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

24.2.21 GPIO Interrupt Control Register (GPIOIC)
GPIOIC is a 16-bit readable/writable register that controls interrupt inputs.
When an IRQ or IRL interrupt is used to cancel software standby mode, the standby cancellation
IRL enable bit (STBIRLEN), described in section 10.5.2 Bus Control Register 2 (BCR2), should
be set to 1.
Initial value:
Bit
1, 0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
R/W:
Bit:
⎯
PTIREN15
PTIREN14
PTIREN13
PTIREN12
PTIREN11
PTIREN10
PTIREN9
STBRT8
STBRT7
STBRT6
STBIRQ5
STBIRQ4
Bit Name
Bit Name
EN15
PTIR
R/W
15
0
EN14
PTIR
R/W
14
0
EN13
PTIR
R/W
13
0
Initial value
All 0
Initial value
0
0
0
0
0
0
0
0
0
0
0
0
EN12
PTIR
R/W
12
0
EN11
PTIR
R/W
11
0
EN10
PTIR
R/W
10
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
PTIR
EN9
R/W
9
0
Description
Reserved
These bits are always read as 0, and the write
value should always be 0.
Description
Port Interrupt Enable
The setting whether to use the port as a GPIO
interrupt can be set for each bit.
0: Uses the port as a normal I/O port
1: Uses the port as a GPIO interrupt
Standby Cancellation Setting Bit
In standby mode, if an interrupt to return from
standby mode is detected while the corresponding
STBRT bit is set to 1, the standby mode is
cancelled.
0: Disables canceling standby mode by detection
1: Enables canceling standby mode by detection
Standby Cancellation IRQ Setting Bit
In standby mode, if an IRQ interrupt (IRQ is in the
low level) is detected while the corresponding
STBIRQ bit is set to 1, the standby mode is
cancelled.
0: Disables canceling standby mode by detection
1: Enables canceling standby mode by detection
STB
RT8
R/W
8
0
of an interrupt
of an interrupt
of an IRQ interrupt
of an IRQ interrupt
STB
RT7
R/W
7
0
Rev. 2.00 Feb. 12, 2010 Page 891 of 1330
STB
RT6
R/W
6
0
IRQ5
STB
R/W
5
0
IRQ4
STB
R/W
4
0
IRL3
STB
R/W
3
0
REJ09B0554-0200
IRL2
STB
R/W
2
0
IRL1
STB
R/W
1
0
IRL0
STB
R/W
0
0