HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1127

• Manufacturer Part Number: HD6417760BL200AV
• Description: SH4 7760, 17 X17 256BGA, LCDC, U
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417760BL200AV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

29.3.1
ADDR are 16-bit read-only registers that store the results of A/D conversion, comprising 4
registers from A to D.
An A/D conversion produces 10-bit data, which is transferred for storage into the A/D conversion
data register corresponding to the selected channel. The upper 8 bits of the result are stored in the
upper byte (bits 15 to 8) of the A/D conversion data register. The lower 2 bits are stored in the
lower byte (bits 7 and 6). Bits 5 to 0 of an A/D conversion data register are always read as 0.
Table 29.3 indicates the pairings of analog input channels and data registers ADDRA to ADDRD.
Initial value:
Table 29.3 Analog Input Channels and Corresponding A/D Conversion Data Registers
Analog Input Channel
AN0
AN1
AN2
AN3
Bit
15 to 6
5 to 0
R/W:
Bit:
A/D Conversion Data Registers A to D (ADDRA to ADDRD)
AD9
15
R
Bit Name
AD9 to AD0
—
0
AD8
14
R
0
AD7
13
R
0
AD6
Initial
Value
All 0
All 0
12
R
0
AD5
11
R
0
R/W
R
R
AD4
10
R
0
A/D Conversion Data Register
ADDRA
ADDRB
ADDRC
ADDRD
AD3
R
9
0
Description
Bit Data (10 bits)
Reserved
These bits are always read as 0, and the write value
should always be 0.
AD2
R
8
0
AD1
0
R
7
Rev. 2.00 Feb. 12, 2010 Page 1043 of 1330
AD0
R
6
0
5
0
R
-
R
4
0
-
R
3
0
-
REJ09B0554-0200
R
2
0
-
R
1
0
-
-
R
0
0